at28bv16 16k (2k x 8) battery-voltage ? cmos e 2 prom features 2.7 to 3.6v supply full read and write operation low power dissipation 8 ma active current 50 m a cmos standby current read access time - 250 ns byte write - 3 ms direct microprocessor control data polling read/ busy open drain output on tsop high reliability cmos technology endurance: 100,000 cycles data retention: 10 years low voltage cmos compatible inputs and outputs jedec approved byte wide pinout commercial and industrial temperature ranges description the at28bv16 is a low-power, high-performance electrically erasable and program- mable read only memory with easy to use features. the at28bv16 is a 16k mem- ory organized as 2,048 words by 8 bits. the device is manufactured with atmels reliable nonvolatile cmos technology. the at28bv16 is accessed like a static ram for the read or write cycles without the need of external components. during a byte write, the address and data are latched (continued) plcc top view pdip, soic top view pin name function a0 - a10 addresses ce chip enable oe output enable we write enable i/o0 - i/o7 data inputs/outputs nc no connect dc dont connect pin configurations tsop top view 0308a at28bv16 2-119
description (continued) block diagram temperature under bias................. -55c to +125c storage temperature...................... -65c to +150c all input voltages (including nc pins) with respect to ground ................... -0.6v to +6.25v all output voltages with respect to ground .............-0.6v to v cc + 0.6v voltage on oe and a9 with respect to ground ................... -0.6v to +13.5v *notice: stresses beyond those listed under absolute maxi- mum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indi- cated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings* internally, freeing the microprocessor address and data bus for other operations. following the initiation of a write cycle, the device will go to a busy state and automatically clear and write the latched data using an internal control timer. the end of a write cycle can be determined by data polling of i/o 7. once the end of a write cycle has been detected, a new access for a read or a write can begin. the cmos technology offers fast access times of 250 ns at low power dissipation. when the chip is deselected the standby current is less than 50 m a. atmels 28bv16 has additional features to ensure high quality and manufacturability. the device utilizes error cor- rection internally for extended endurance and for im- proved data retention characteristics. an extra 32-bytes of e 2 prom are available for device identification or tracking. 2-120 at28bv16
device operation read: the at28bv16 is accessed like a static ram. when ce and oe are low and we is high, the data stored at the memory location determined by the address pins is asserted on the outputs. the outputs are put in a high im- pedance state whenever ce or oe is high. this dual line control gives designers increased flexibility in preventing bus contention. byte write: writing data into the at28bv16 is similar to writing into a static ram. a low pulse on the we or ce input with oe high and ce or we low (respectively) initi- ates a byte write. the address location is latched on the last falling edge of we (or ce); the new data is latched on the first rising edge. internally, the device performs a self- clear before write. once a byte write has been started, it will automatically time itself to completion. once a pro- gramming operation has been initiated and for the dura- tion of t wc , a read operation will effectively be a polling operation. data polling: the at28bv16 provides data polling to signal the completion of a write cycle. during a write cycle, an attempted read of the data being written results in the complement of that data for i/o 7 (the other outputs are indeterminate). when the write cycle is fin- ished, true data appears on all outputs. ready/ busy (tsop only) : ready/ busy is an open drain output; it is pulled low during the internal write cycle and released at the completion of the write cycle. write protection: inadvertent writes to the device are protected against in the following ways. (a) vcc sense if vcc is below 2.0v (typical) the write function is inhibited. (b) vcc power on delay once vcc has reached 2.0v the device will automatically time out 5 ms (typical) before allowing a byte write. (c) write inhibit holding any one of oe low, ce high or we high inhibits byte write cy- cles. device identification: an extra 32-bytes of e 2 prom memory are available to the user for device identification. by raising a9 to 12 0.5v and using ad- dress locations 7e0h to 7ffh the additional bytes may be written to or read from in the same manner as the regular memory array. at28bv16 2-121
symbol parameter condition min max units i li input load current v in = 0v to v cc + 1.0v 5 m a i lo output leakage current v i/o = 0v to v cc 5 m a i sb v cc standby current cmos ce = v cc - 0.3v to v cc + 1.0v 50 m a i cc v cc active current ac f = 5 mhz; i out = 0 ma; ce = v il 8ma v il input low voltage 0.6 v v ih input high voltage 2.0 v v ol output low voltage i ol = 1 ma 0.3 v i ol = 2 ma for rdy/ busy 0.3 v v oh output high voltage i oh = -100 m a 2.0 v dc characteristics mode ce oe we i/o read v il v il v ih d out write (2) v il v ih v il d in standby/write inhibit v ih x (1) x high z write inhibit x x v ih write inhibit x v il x output disable x v ih x high z notes: 1. x can be v il or v ih . 2. refer to ac programming waveforms. operating modes at28bv16-25 at28bv16-30 operating temperature (case) com. 0c - 70c 0c - 70c ind. -40c - 85c -40c - 85c v cc power supply 2.7v to 3.6v 2.7v to 3.6v dc and ac operating range 2-122 at28bv16
notes: 1. ce may be delayed up to t acc - t ce after the address transition without impact on t acc . 2. oe may be delayed up to t ce - t oe after the falling edge of ce without impact on t ce or by t acc - t oe after an address change without impact on t acc . 3. t df is specified from oe or ce whichever occurs first (c l = 5 pf). 4. this parameter is characterized and is not 100% tested. ac read waveforms (1, 2, 3, 4) t r , t f < 20 ns input test waveforms and measurement level output test load typ max units conditions c in 46pfv in = 0v c out 812pfv out = 0v pin capacitance (f = 1 mhz, t = 25c) (1) note: 1. this parameter is characterized and is not 100% tested. at28bv16-25 at28bv16-30 symbol parameter min max min max units t acc address to output delay 250 300 ns t ce (1) ce to output delay 250 300 ns t oe (2) oe to output delay 100 100 ns t df (3, 4) ce or oe high to output float 0 55 0 55 ns t oh output hold from oe, ce or address, whichever occurred first 00ns ac read characteristics at28bv16 2-123
ac write characteristics symbol parameter min max units t as , t oes address, oe set-up time 10 ns t ah address hold time 100 ns t wp write pulse width ( we or ce) 150 1000 ns t ds data set-up time 100 ns t dh , t oeh data, oe hold time 10 ns t cs , t ch ce to we and we to ce set-up and hold time 0 ns t wc write cycle time 3.0 ms t db time to device busy 50 ns ac write waveforms we controlled ce controlled 2-124 at28bv16
symbol parameter min typ max units t dh data hold time 10 ns t oeh oe hold time 10 ns t oe oe to output delay (2) ns t wr write recovery time 0 ns data polling characteristics (1) notes: 1. these parameters are characterized and not 100% tested. 2. see ac characteristics. data polling waveforms at28bv16 2-125
t acc (ns) i cc (ma) ordering code package operation range active standby 250 8 0.05 at28bv16-25tc 28t commercial at28bv16-25jc 32j (0 c to 70 c) at28bv16-25pc 24p6 AT28BV16-25SC 24s 8 0.05 at28bv16-25ti 28t industrial at28bv16-25ji 32j (-40 c to 85 c) at28bv16-25pi 24p6 at28bv16-25si 24s 300 8 0.05 at28bv16-30tc 28t commercial at28bv16-30jc 32j (0 c to 70 c) at28bv16-30pc 24p6 at28bv16-30sc 24s 8 0.05 at28bv16-30ti 28t industrial at28bv16-30ji 32j (-40 c to 85 c) at28bv16-30pi 24p6 at28bv16-30si 24s note: 1. see valid part number table below. ordering information (1) the following table lists standard atmel products that can be ordered. device numbers speed package and temperature combinations at28bv16 25 jc, ji, pc, pi, sc, si, tc, ti at28bv16 30 jc, ji, pc, pi, sc, si, tc, ti valid part numbers package type 28t 28 lead, plastic thin small outline package (tsop) 32j 32 lead, plastic j-leaded chip carrier (plcc) 24p6 24 lead, 0.600" wide, plastic dual inline package (pdip) 24s 24 lead, 0.300" wide, plastic gull wing small outline (soic) 2-126 at28bv16
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